For v1.3 of the engine on a quad core hyperthreading 3.5Ghz Intel Core i7 3770K, I found the following latency graph which is in CPU cycles:

The solid lines represent average dispatch to execution and execution finish to completion notification latencies and are cumulative on the left scale, whilst the dotted lines represent minimum latencies and are cumulative on the right scale. As one can see, one can expect a minimum of around 6,000 CPU cycles between dispatch and the operation beginning, and a minimum of around 4,000 cycles between the operation completing and its op reference becoming signalled, thus making total minimum latency per op around 10,000 CPU cycles, or around 2.5 microseconds.

Average latency is rather worse of course, but if you don't exceed CPU cores you can expect a 60,000 CPU cycle total latency with a 95% confidence interval of plus/minus 600 CPU cycles, which is 15 microseconds plus/minus 0.15 microseconds. Given that a filing system on a PCIe SSD might have a 80 microsecond latency, AFIO could be adding 20% to that, however do bear in mind that a thread sleep and wake costs 52 microseconds so we are operating pretty close to hardware limits here.